Every serial communication system utilized for wide area network data communication adheres to a predetermined communication standard. Each communication standard specifies predetermined characteristics of the communicating data. The specified characteristics include, but are not limited to, both a number of data bits called a frame, and communication frequency rate of a communication channel. For example, a typical communication frequency data rate for a communication channel is 64 kbps (64 kilo-bits-per-second). A plurality of sub-communication channels is additionally formed within a larger communication channel by utilizing a time slot for each sub-communication channel. A typical sub-communication channel operates at 8 kbps. A typical frame has 256 bits; other known frames respectively have 512 and 1024 bits. The time slot for each sub-communication channel is repeated on a cyclical basis as controlled by a cycle start strobe signal. A large communication channel that utilizes multiple 64 kbps sub-channels is specified by an ISO "H" channel designation and is also termed a wideband channel.
A problem concerning flexibility of the various communication standards is implementing data communication hardware that interfaces with a variety of communication standards having different bit frequencies, channel bit lengths, and cycle repeat lengths. One approach to interfacing with the variety of communication standards is to have multiple hardware solutions, one for each communication standard. A disadvantage to the above solution is the hardware cost associated with supporting each of the communication standards.
A known solution that permits data having a variable number of bits to be communicated utilizes a memory unit. The memory unit stores channel address for each of a predetermined time frames of communication data. By providing a channel address for each bit time of communication data, a variable number of bits per cycle can be connected to each data communication channel. A problem with having a memory unit store channel address information for each time frame of communicated data is that the memory unit must be sized to accommodate a predetermined maximum cycle length. For a general purpose serial communication system, the amount of required memory is typically both too large and expensive.
Another known solution utilizes a series of preset registers with a dedicated counter for each communication channel. For example, one register determines one of a plurality of allocated time slots for communication, and a separate register determines a number of bits to be communicated. A problem with having a series of preset registers is an inflexibility to support communication variations within a time division multiplexed system.
It is therefore desired to have a cost efficient time division multiplexed serial communication system which is flexible enough to accommodate a variety of communication standards.